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Atomic-Scale Defects in Computer Chips Detected Using Advanced 3D Imaging

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Cornell Researchers Unveil Atomic-Scale 3D Imaging for Computer Chips

Researchers from Cornell University, in collaboration with Taiwan Semiconductor Manufacturing Company (TSMC) and Advanced Semiconductor Materials (ASM), have developed a high-resolution 3D imaging method capable of detecting atomic-scale defects in computer chips. The findings were published on February 23 in Nature Communications, with doctoral student Shake Karapetyan as the lead author.

This imaging tool is described as crucial for debugging and fault-finding in computer chip development and is expected to have applications across modern electronics and next-generation technologies.

Research Overview

The project, led by David Muller, the Samuel B. Eckert Professor of Engineering at Cornell, focused on the challenge of observing atomic structures in computer chips that are otherwise undetectable. The developed method provides direct visibility into these atomic structures, which is critical as chip complexity and component miniaturization increase.

Challenges in Semiconductor Manufacturing

The semiconductor industry has faced ongoing challenges due to minute defects, which have become more significant as technology advances and component sizes approach the atomic scale. Transistors, fundamental components of computer chips that act as electrical switches, have evolved from flat designs to vertical 3D structures due to diminishing horizontal space.

Modern transistor channels can be as narrow as 15 to 18 atoms wide.

The precise arrangement of every atom is critical for performance, and atomic-level roughness within these channels can impede functionality, making troubleshooting difficult.

Methodology: Electron Ptychography

The research utilized electron ptychography, a computational imaging method that incorporates an electron microscope pixel array detector (EMPAD). The EMPAD, co-developed by Muller's group, collects detailed scattering patterns of electrons as they pass through transistors. By analyzing changes in these patterns across different scan positions, scientists can reconstruct images with exceptional clarity.

This technique holds a Guinness World Record for achieving the world's highest resolution images, providing detailed views of atoms. David Muller, along with Glen Wilk (now VP of technology at ASM), previously contributed to the development and use of hafnium oxide as a gate material, which subsequently became an industry standard. Muller's earlier work at Bell Labs from 1997 to 2003 also explored the limits of transistor miniaturization and the application of hafnium oxide.

Defect Identification and Potential Impact

Using this imaging method, researchers identified interface roughness, referred to as "mouse bites," within the transistor channels. These defects were observed to form during the optimized growth process of sample structures provided by the nanoelectronics hub Imec.

The ability to directly observe device structures after each fabrication step offers a clearer understanding of how various processes, such as chemical etching, deposition, heating, and other temperature variations, affect the atomic structure of devices and their final product.

The new imaging capability is anticipated to impact various modern electronic devices, ranging from mobile phones and automobiles to AI data centers. It is also expected to assist in the development and debugging of next-generation technologies, including quantum computers, which require precise structural control of materials.

Acknowledgements

Co-authors of the research included Steven Zeltmann, staff scientist at PARADIM, and Ta-Kun Chen and Vincent Hou of TSMC. The research received funding from TSMC. Microscopy facilities were supported by the Cornell Center for Materials Research (CCMR) and the Platform for the Accelerated Realization, Analysis and Discovery of Interface Materials (PARADIM), both of which are funded by the National Science Foundation.